1. Technical Field
The present invention relates to vertical cavity surface emitting lasers (VCSELs) and, more specifically, to a process for fabricating surface emitting lasers.
2. Art Background
Laser arrays capable of both high-speed and multiple wavelength operation are important for high-capacity optical network applications based on high-density wavelength division multiplexing (HD-WDM). The laser array is formed on a single semiconductor substrate. Such arrays are referred to as monolithic arrays because they are formed on a single substrate. The emission wavelength of a laser is determined by its cavity length (which includes the length of the active region in the direction of the emission) and the refractive index of the materials in the cavity. Therefore, in an array of devices in which not all devices emit at the same wavelength, not all devices in the array have the same cavity length and/or the same material composition (refractive index). That is, some of the devices have a first cavity length and/or a first refractive index and emit at a first wavelength, some devices have a second cavity length and/or a second refractive index and emit light at a second wavelength, etc.
Two types of monolithic arrays of laser devices have been formed. In one type, light is emitted in a direction parallel to the substrate. In a second type, light is emitted in a direction perpendicular to the substrate. This second type of monolithic array is referred to as vertical cavity surface emitting lasers (VCSELs). The first type of array is somewhat easier to fabricate than a VCSEL array. However, a VCSEL array is advantageous because the individual lasers in a VCSEL array can be processed, tested, bonded, and operated in parallel.
An array of VCSEL devices has a plurality of such devices formed on a single substrate. In FIG. 1, three VCSEL devices, 110, 115, and 120 are illustrated. The three devices are formed on a single substrate 125. Each device 110, 115, and 120 has a bottom mirror 130 and a top mirror 135. The mirrors are typically Bragg mirrors made of a dielectric material. The Bragg mirrors have a high (i.e. 99.9 percent) degree of reflectivity over a broad (i.e. on the order of 30 nm to 40 nm) range of wavelengths. Each device has a cavity region 140, 145, and 150. The cavity region is a composite semiconductor material, typically a III-V semiconductor material (the III and V referring to groups of elements in the Mendeleev periodic table). Each cavity region has a top confinement layer 155 and a bottom confinement layer 160. A small portion of the top mirror 135 and bottom mirror 130 is also part of the cavity region.
The devices 110, 115, and 120 are depicted as having two quantum wells, 165 and 170, each. One skilled in the art will recognize that the number of quantum wells in an active region is largely a matter of design choice. Barrier layers 175 are formed between the individual quantum wells, 165 and 170; between the top quantum well 170 and the top separate confinement layer 155; and between the bottom quantum well 165 and the bottom separate confinement layer 160. The combination of quantum well layers and barrier layers is referred to herein as the device active region.
In the devices depicted in FIG. 1, the cavity region 140 of device 110 has a first thickness, the cavity region 145 of device 115 has a second thickness, and the cavity region of 150 of device 120 has a third thickness. Because the total thickness of the cavity region affects the wavelength of the light emitted by the laser, each device, 110, 115, and 120 emits light at a wavelength that is different from the emission wavelength of the other two devices. The thickness of the cavity region determines the wavelength of light emitted by the device. Furthermore, the active region of the device is the source of optical gain (which is required for laser operation) when the device is biased properly. The relationship between the optical gain spectra and the emission wavelength of the device affects device performance. For example, peak laser operation efficiency is obtained when the peak of the optical gain spectra for a device coincides with the emission wavelength of the device.
Several different techniques have been proposed for fabricating VCSEL arrays in which some devices have a cavity region with a first length and other devices have a cavity region with a length other than the first length. Maeda, M., et al., xe2x80x9cMultigigabit/s Operation of 16-Wavelength Vertical-Cavity Surface-Emitting Laser Array,xe2x80x9d IEEE Photonics Technology Letters, Vol. 3, No. 10, pp. 863-865 (1991) describes a technique in which the VCSEL array is formed by using molecular beam epitaxy to form the active layer of the VCSEL devices. In order to obtain an array of VCSEL devices in which the thickness and composition of the active region varies among the devices, the wafer is not rotated as the material for the active region is deposited. This results in compositional and thickness variations in the layer. The VCSEL devices formed from this layer emit light at a wavelength that is determined by the thickness and composition of the portion of the active layer for a particular device. However, it is difficult to precisely control the thickness and compositional variations in an active layer formed using this technique. Consequently, since the differences in the composition and thickness of the MBE layer is the result of random differences that occur in the layer during its formation, it is difficult to control the difference between the different lasing wavelengths of the devices in the array. It is also difficult to control the tuning of the gain peak and cavity modes for the devices using this technique.
Wipiejewskil, T., et al., xe2x80x9cVertical-Cavity Surface-Emitting Laser Diodes with Post-Growth Wavelength Adjustment,xe2x80x9d IEEE Photonics Technology Letters, Vol. 7, No. 7, pp. 727-729 (1995) describes a technique in which the cavity length is adjusted after it is formed using anodic oxidation and etching. In this process, the cavity for the devices in the array is formed over an AlAs-GaAs (aluminum arsenide-gallium arsenide) Distributed Bragg Reflector (DBR). The cavity is formed by epitaxial growth of a composite semiconductor material on the DBR. The cavity layer, as formed, is uniform in composition and thickness over the surface of the substrate. The cavity layer is then selectively etched to set the laser cavity length for the individual devices in the array. The lasing mode of each device in the laser array is thereby set in this manner. However, because the composition of the quantum wells is the same for all of the devices in the array, the wavelength of the gain peak is the same for all of the devices in the array. Consequently, the gain peak cannot be controlled to match the cavity mode. Furthermore, the device is very complex to manufacture, due to the multiple mask levels required to accomplish the etching.
The relationship between the gain spectra, the emission wavelength, and the reflectivity of the DBR better understood with reference to FIG. 2. In FIG. 2, the reflectivity of the DBR as a function of wavelength is illustrated by line 190. As illustrated in FIG. 2, a DBR that has a reflectivity close to 1 over a wide wavelength range can be formed. Thus a single deposition step that provides a reflectivity of 1 over a broad range of wavelength can be used as the DBR for any laser device that emits light in that broad range. A wavelength emission spectrum is illustrated by line 191. The wavelength emission spectrum is the range of wavelengths of light that are emitted by the device active region. Note that the wavelength emission spectrum (as a function of power) has peak wavelength, xcexg. This is the peak emission wavelength, i.e. that wavelength of light in the optical emission spectrum that is emitted at maximum intensity. The laser cavity of the device also has an emission spectra and is illustrated by line 192. The peak emission wavelength for the cavity is illustrated as xcexc (also referred to as the cavity mode). VCSEL devices emit light at peak efficiency when xcexg equals xcexc.
Yuen, W., et al. xe2x80x9cMultiple-Wavelength Vertical-Cavity Surface-Emitting Laser Arrays with a Record Wavelength Span,xe2x80x9d IEEE Photonics Technology Letters, Vol. 8, No. 1, pp. 4-6 (1996) describes a process in which the local temperature of the substrate surface is controlled during the formation of the layer which becomes the active region of the devices in the array. The layer is grown by molecular beam epitaxy (MBE). The temperature of the substrate affects the MBE growth rate. The back of the substrate is patterned. When placed on a uniformly heated substrate-holder, the thinner regions of the substrate have a different temperature compared to the thicker regions. This leads to different growth rates in different parts of the wafer. Although the thickness of the active layer for individual devices is controllable using this technique, the composition is not controllable for individual devices. Consequently, the gain peak of the individual device cannot be controlled to match the cavity mode.
In Luong, S. Q., et al., xe2x80x9cMonolithic Wavelength-Graded VCSEL and Resonance-Enhanced Photodetector Arrays for Parallel Optical Interconnects, IEEE Photonics Technology Letters, Vol. 10, No. 5, pp. 642-644 (1996), the VCSEL array is formed on the surface of a patterned substrate (i.e. a series of photolithographically defined ridges and channels). A standard AlGaAs-GaAs VCSEL structure is grown by low pressure MOCVD (metal-organic chemical vapor deposition). Since the MOCVD growth rate is affected by the pattern, the thickness of the individual VCSELs formed on the surface of the substrate depends upon the portion of the substrate on which they were formed. However, the precise pattern needed to produce the desired VCSEL array must be determined empirically, which makes the design process difficult. Furthermore, it is difficult to obtain devices that have a gain peak that matches the cavity mode using this technique.
Accordingly, processes for making a monolithic array of VCSEL devices that emits light at multiple wavelengths have been proposed. However, a process for fabricating such an array which permits the gain peaks of the individual devices in the array to be tuned to the cavity mode is desired. Additionally, a process which reproducibly and accurately produces an array of devices in which the individual devices emit light at specified wavelengths is desired. In particular, a process which permits the manufacture of a number of identical arrays on the same wafer is desired.
The present invention is directed to the fabrication of a monolithic array of VCSEL devices. The array emits light at multiple (n) wavelengths, and n is at least two. Although the array of devices emits light at n wavelengths, each individual device in the array emits light at a specified wavelength (xcexsn). The array is fabricated such that a portion of the total number of individual devices that make up the array emit light at one wavelength (xcexs1) and another portion of the total number of individual devices in the array emit light at a second wavelength (xcexs2). Although, at a minimum, the array emits light at two different wavelengths, the present invention contemplates fabricating an array of devices that emits light at three or more different wavelengths.
In the process of the present invention, the particular emission wavelengths (xcexs) for the VCSEL array are first specified. Some devices emit light at xcexs1, some devices emit light at xcexs2, etc. Based upon the reflectivity of the materials selected for the mirrors of the device and the desired wavelength of the cavity modes (xcexc), the total thickness for the cavity region (Ln) associated with each xcexcn is determined.
The devices are also designed so that a desired relationship between xcexc and the peak wavelength (xcexg) of the optical gain spectrum of the device is obtained. The optical gain spectrum of a device is determined by the composition and thickness of the active region within the cavity region. An advantage of being able to fabricate an array of devices with a desired relationship between xcexg and xcexc is that, for one operating voltage, threshold current for all devices in the array will be about the same. This desired relationship is about uniform for all of the devices in the array. That is, the difference between xcexs and xcexg for all devices in the array is within about 5 nm for all the devices. For example, (xcexs1xe2x88x92xcexg1) is within 5 nm of (xcexs2xe2x88x92xcexg2). It is advantageous if the difference between xcexs and xcexg is within a range of 2 nm for all of the devices in the array.
Devices emit most efficiently at the selectedxcexs when xcexg is approximately equal to xcexc. Therefore, in one embodiment of the present invention, the process is designed to provide an array of devices in which xcexg is approximately equal to xcexc for each device. Therefore, based on the desired xcexs, the composition and thickness (Wn) of the quantum wells that are required for VCSEL devices to emit at the peak wavelength xcexgn of the gain spectra (wherein xcexsn=xcexgn) are determined. The composition and thickness for each quantum well is selected so that all devices in the array will emit efficiently at the operational voltage for the array. Next, the relationship between Ln and xcexsn is determined. The differences between Ln for the various devices in the array (e.g. the difference between Ln and Ln+1) is also determined. This is referred to herein as the desired xcex94L.
Once the overall thickness (Ln) of the cavity region, the mirror material, and the composition and thickness (Wn) of the quantum wells is determined for the devices in the array that emit at each xcexsn, the process is designed to fabricate the array of devices. First, a layer of uniform thickness and composition is formed on the substrate. This first layer is the bottom mirror of the device.
Selective area growth (SAG) is used to control the overall thickness of the cavity regions of the individual devices in the VCSEL array in order to obtain the desired xcex94L. SAG is also used to control the growth rate (R) of the III-V semiconductor material that, by virtue of subsequent processing, becomes the device active region of the VCSEL devices. The portion formed by SAG includes the device active regions containing the quantum wells.
Referring to FIG. 3A, a layer of uniform thickness 210 is first formed on the semiconductor substrate 200. The substrate 200 is typically a III-V semiconductor such as gallium arsenide or indium phosphide. The layer of uniform thickness 210 functions as the bottom mirror (a distributed Bragg Reflector) for the individual devices in the array. The distributed Bragg reflector is a multilayer film in which the individual layers alternate between a first material and a second material. Examples of suitable alternating layers for DBRs include indium-gallium-arsenide-phosphide/indium phosphide, and aluminum-arsenide/gallium arsenide. In this embodiment of the present invention, a second layer of uniform thickness 215 is formed over the bottom mirror 210. This second layer 215 is the bottom separate confinement layer for the devices in the array. In this embodiment, additional portions of the VCSEL devices are selectively formed on the bottom confinement layer. In another embodiment, additional portions of the VCSEL devices are selectively formed directly on the bottom mirror.
After the layer or layers of uniform thickness are formed, selective area growth (SAG) is used to selectively control the thickness of the device active layers in order to obtain an array of devices that emits light at the desired wavelengths. In selective area growth, oxide pads 220 are used to control the placement, thickness and composition of III-V semiconductor materials. The use of SAG to control the placement, thickness and composition of III-V semiconductor materials is described in xe2x80x9cPROCESS FOR FABRICATING AN OPTICAL WAVEGUIDE,xe2x80x9d U.S. Pat. No. 6,261,857 filed Jun. 17, 1998, which is hereby incorporated by reference. As described in that reference, oxide pads are used in SAG to control the relative growth rate of a Group III-V semiconductor material in the region near the oxide pads. The dimensions and placement of the oxide pads in the SAG mask affect the relative growth rate. Consequently, the dimensions and placement of the oxide pads are selected to control the thickness of the Group III-V layer formed on the wafer on which the SAG mask is formed. This results in regions of different thickness at different places on the wafer. Furthermore, if the III-V semiconductor is an alloy that contains more than one Group III or Group V element, the composition of the material grown proximate to the oxide pads will also vary as a function of the dimensions and placement of the oxide pads. Consequently, the dimensions and placement of the oxide pads are used to control the thickness (and, in certain instances, compositional variations) during MOCVD growth. For example, during SAG, the thickness of the III-V semiconductor material formed between a pair of oxide pads with a first set of dimensions is different from the thickness of the III-V semiconductor material formed between a pair of oxide pads with a second set of dimensions. In those instances where the III-V semiconductor contains more than one Group III or Group V element, there will also be compositional variations between the material formed between the oxide pads with the first set of dimensions and the material formed between the oxide pads with the second set of dimensions.
In the process of the present invention, SAG is integrated with non-selective (i.e. uniform) MOCVD deposition to provide an array of devices in which the compositional and thickness variations of the quantum well layers, as well as the overall thickness of the cavity region of each device, translates into an array of devices wherein each device has the desired relationship between the peak of the emission spectra (xcexg) and the cavity mode (xcexc) and in which each device emits at a desired xcexs. As previously noted, devices in which xcexg equals xcexc operate at peak efficiency.
Using SAG, quantum well layers in the device active regions 225 of different thicknesses (and, in certain embodiments, composition) are formed in a single deposition step. Thus, the various xcexg""s for the various devices in the array (i.e., xcexg1 for device 1, xcexg for device 2, etc.), is obtained by SAG. However, the devices 236, 237, and 238 are formed by some combination of uniform processing and SAG. SAG is used to provide the desired xcex94L among the cavity regions of the devices in the array that emit at different wavelengths. The aggregate thickness of layers 215, 225, and 230 (plus a small portion of layers 210 and 235) is the cavity thickness that determines the xcexc for the device. Uniform processing is used to ensure that the aggregate thickness (L) of these layers provides the desired xcexc for the devices in the array.
Thus, SAG is continued until the desired difference in thickness is obtained for the active regions of the various devices in the array. Once the desired difference in thickness is obtained, and the quantum well structures have been formed by SAG, SAG is stopped.
As illustrated in FIG. 3B, after the device active regions 225 are formed, the oxide pads 220 are removed, leaving the active regions 225. A conformal layer of a III-V semiconductor material 230 is then formed over the surface of the structure. Another layer of uniform composition and thickness, 235, is formed over layer 230. The layer of uniform thickness 235 functions as the top mirror (a distributed Bragg Reflector) for the individual devices in the array. The distributed Bragg reflector is an alternating stack of materials as previously described.
Referring to FIG. 3C, the substrate is then etched to form the devices 236, 237 and 238. The width of these devices corresponds to the distance between the dashed lines in FIGS. 3A and 3B. The region defined by the dashed lines is equidistant between the oxide pads 220. For example, for a pair of oxide pads spaced 50 xcexcm apart, the portion that is not removed is the portion that corresponds to a narrow portion (i.e. 5 xcexcm) that is in the center between the two oxide pads. The center portion is selected because the variation in thickness as a function of proximity to the oxide pads increases with proximity to the oxide pads. Therefore, the III-V material formed between the oxide pads has its most uniform thickness in the center region between the oxide pads.
The cavity region of the devices 236, 237 and 238 consist of layers 215, 225, and 230 (and portions of the mirror layers 210 and 235). Layer 225 is the active region, which includes the quantum well structure for the devices. The compositional and thickness variations of layer 225 between devices 236, 237 and 238 are obtained by forming this layer using SAG.
The SAG oxide mask is designed by an iterative process. First, oxide pads of a certain dimension are selected, and the effect of the oxide pads on the growth rate of III-V material and the composition of the III-V material is modeled. The selected proximity and dimensions of the oxide pads are those that provide modeled composition and thickness of the III-V semiconductor material that will, with subsequent processing, provide devices that emit at the desired xcexsn and have the desired Ln.
When SAG is commenced will depend on the relationship between the desired L and the desired xcex94L for the devices in the array. If the desired xcex94L is obtained through SAG of the quantum wells and the boundary layers between quantum wells alone, then SAG is optionally commenced after a second uniform-thickness layer is formed over the bottom mirror layer. This second layer, after subsequent processing, becomes the bottom confinement layer for the devices in the array. If the desired xcex94L is not obtained by SAG of the quantum wells and boundary layers alone, then at least some portion of either the bottom confinement layer, the top confinement layer, or both, must be formed by SAG.
The present invention is further described using specific examples. The examples are provided for illustrative purposes and are not intended to limit the invention as desired by the appended claims.